What processor do you have?

[TESLA-X4]

As in the title, I'd like to know what processors everyone are using (particularly those running servers) so I can make an informed decision on which SSE instruction set to enable when compiling the mod. This is not the place to boast about how awesome your rig is, so don't start with that stuff. As far as possible, I'd like to compile it with SSE optimizations enabled but without sacrificing support for any older rigs that may still be running the mod/hosting a public server, so sound off here if you're still using an old CPU, be it for hosting a server or playing the mod.

Thanks.

[Gary]

AMD Phenom II X4 970 Black Edition(Quad Core, clocked at 3.5(stock))

According to HWiNFO, I support the following:
SSE
SSE-2
SSE-3
SSE4A

All the information you should need on it, if you want:

► Show Spoiler

AMD Phenom II X4 970 Black Edition ----------------------------------------

[General Information]
Processor Name: AMD Phenom II X4 970 Black Edition
Current Processor Frequency: 3492.3 MHz
Current Processor Frequency [MHz]: 3492
CPU ID: 00100F43
Extended CPU ID: 00100F43
CPU Brand Name: AMD Phenom(tm) II X4 970 Processor
CPU Vendor: AuthenticAMD
CPU Stepping: RB-C3
CPU Code Name: Deneb
CPU Thermal Design Power (TDP): 124.5 W
CPU Thermal Design Current (TDC): 84.4 A
CPU Platform: Socket AM3
Microcode Update Revision: 10000B6
Number of CPU Cores: 4
Number of Logical CPUs: 4
[Operating Points]
CPU HFM (Maximum): [Unlimited]
CPU Current: 3492.3 MHz = 17.50 x 199.6 MHz @ 1.4750 V
Northbridge Maximum: [Unlimited]
Northbridge Current: 2000.0 MHz = 10.00 x 200.0 MHz @ 1.1000 V
CPU Bus Type: Hyper-Transport v3.00
Maximum Supported Hyper-Transport Link Clock: 2600 MHz
Current Hyper-Transport Link Clock: 2000 MHz
[Cache and TLB]
L1 Cache: Instruction: 4 x 64 KBytes, Data: 4 x 64 KBytes
L2 Cache: Integrated: 4 x 512 KBytes
L3 Cache: 6 MBytes
Instruction TLB: Fully associative, 32 entries
Data TLB: Fully associative, 48 entries
[Standard Feature Flags]
FPU on Chip Present
Enhanced Virtual-86 Mode Present
I/O Breakpoints Present
Page Size Extensions Present
Time Stamp Counter Present
Pentium-style Model Specific Registers Present
Physical Address Extension Present
Machine Check Exception Present
CMPXCHG8B Instruction Present
APIC On Chip / PGE (AMD) Present
Fast System Call Present
Memory Type Range Registers Present
Page Global Feature Present
Machine Check Architecture Present
CMOV Instruction Present
Page Attribute Table Present
36-bit Page Size Extensions Present
Processor Number Not Present
CLFLUSH Instruction Present
Debug Trace and EMON Store Not Present
Internal ACPI Support Not Present
MMX Technology Present
Fast FP Save/Restore (IA MMX-2) Present
Streaming SIMD Extensions Present
Streaming SIMD Extensions 2 Present
Self-Snoop Not Present
Multi-Threading Capable Present
Automatic Clock Control Not Present
IA-64 Processor Not Present
Signal Break on FERR Not Present
Streaming SIMD Extensions 3 Present
PCLMULQDQ Instruction Support Not Present
MONITOR/MWAIT Support Present
Supplemental Streaming SIMD Extensions 3 Not Present
FMA Extension Not Present
CMPXCHG16B Support Present
Streaming SIMD Extensions 4.1 Not Present
Streaming SIMD Extensions 4.2 Not Present
x2APIC Not Present
POPCNT Instruction Present
AES Cryptography Support Not Present
XSAVE/XRSTOR/XSETBV/XGETBV Instructions Not Present
XGETBV/XSETBV OS Enabled Not Present
AVX Support Not Present
Half-Precision Convert (CVT16) Not Present
[Extended Feature Flags]
FPU on Chip Present
Enhanced Virtual-86 Mode Present
I/O Breakpoints Present
Page Size Extensions Present
Time Stamp Counter Present
AMD-style Model Specific Registers Present
Machine Check Exception Present
CMPXCHG8B Instruction Present
APIC On Chip Present
SYSCALL and SYSRET Instructions Present
Memory Type Range Registers Present
Page Global Feature Present
Machine Check Architecture Present
CMOV Instruction Present
Page Attribute Table Present
36-bit Page Size Extensions Present
Multi-Processing / Brand feature Not Present
No Execute Present
MMX Technology Present
MMX+ Extensions Present
Fast FP Save/Restore Present
Fast FP Save/Restore Optimizations Present
1 GB large page support Present
RDTSCP Instruction Present
x86-64 Long Mode Present
3DNow! Technology Extensions Present
3DNow! Technology Present
LAHF/SAHF Long Mode Support Present
Core Multi-Processing Legacy Mode Present
Secure Virtual Machine Present
Extended APIC Register Space Present
LOCK MOV CR0 Support Present
Advanced Bit Manipulation Present
SSE4A Support Present
Misaligned SSE Mode Present
PREFETCH(W) Support Present
OS Visible Work-around Support Present
Instruction Based Sampling Present
XOP Instruction Support Not Present
SKINIT, STGI, and DEV Support Present
Watchdog Timer Support Present
TBM0 Instruction Support Not Present
Lightweight Profiling Support Not Present
FMA4 Instruction Support Not Present
Translation Cache Extension Not Present
NodeId Support Not Present
Trailing Bit Manipulation Not Present
Topology Extensions Not Present
Core Performance Counter Extensions Not Present
NB Performance Counter Extensions Not Present
[Enhanced Features]
Core Performance Boost Not Supported
[Memory Ranges]
Maximum Physical Address Size: 48-bit (256 TBytes)
Maximum Virtual Address Size: 48-bit (256 TBytes)
[MTRRs]
Range 0-80000000 (0MB-2048MB) Type: Write Back (WB)
Range 80000000-C0000000 (2048MB-3072MB) Type: Write Back (WB)
Range C0000000-C8000000 (3072MB-3200MB) Type: Write Back (WB)

[MaestraFénix]

The show spoiler is broken :/

Intel Core2 Duo P8600 2.4GHz

I´ll put later what SSE i can support.

[TESLA-X4]

Well, those two processors have no issues at all with SSE2, which requires at least an AMD Athlon 64 or an Intel Pentium 4 processor. Is anyone using/planning to use CPUs older than those to run the game/host a public server (don't scoff at this, I just want to be sure)? If not, I'm going to compile the mod with SSE2 instructions enabled.

[Neico]

I would have done that ages ago if I were you, those who still don't have a SSE2 capable CPU should even have trouble running any Orangebox Game at all

[LivingWithGames]

I've got a Intel i3 590...with 3Ghz of speed.

I dunno much about it, but it can handle a full server in OC with ease, no slow downs I think, depends of map.

[Gary]

So if you compile with an SEE instruction set, it breaks compatibility with processors that don't support SEE?

The show spoiler is broken :/

Just quote my post.

[TESLA-X4]

Yeah, that's why I'd like to know if anyone still uses processors older than AMD A64 / Intel P4 with the game.

[Gary]

Is it possible to distribute non-SSE binaries as well?

[TESLA-X4]

Yes, it should be possible for the server binary. But I'm worried about the possibility of clients switching to those binaries instead (and Valve's rather ambiguous reply regarding VAC has been of little help). Perhaps I'm worrying too much here, but I tend to lean toward the safer side of things. Especially given the stakes.

[Neico]

You could just ask the people to open the console with -console and let them print out one of the last lines (since that line doesn't show newer CPU features like SSE3 etc. anyways):

6 CPUs, Frequency: 3.2 Ghz, Features: AuthenticAMD SSE SSE2 MMX 3DNow RDTSC CMOV FCMOV

[leilei2]

Are there really servers out there that use a Pentium II or AMD Athlon Thunderbird?

SSE has been supported for quite a long time now already. Pentium IV has SSE2 even.

[Gary]

Well. 99.66% of people(who were in the survey) on Steam support SEE2:


Hell, ~98% of people support SEE3.

[TESLA-X4]

Derp, I forgot that Valve has that hardware survey. :v

[leilei2]

Also doesn't Steam require SSE now?